DVCon 2013: Interview with Oski Technology CEO Vigyan Singhal
Joseph Hupcey III speaks with Vigyan Singhal, the CEO of from formal and ABV specialist Oski Technology, about how careful advanced planning can substantiall...
cadencedesign- Length: 3:56
- Views: 36
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DVCon 2013 - Interview with AMIQ CEO Cristian Amitroaie
Joseph Hupcey III speaks with Amiq CEO Cristian Amitroaie discuss trends in supporting the unavoidable mix of design & verification languages in simple work ...
- cadencedesign
- Length: 3:20
- Views: 26
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DVCon 2013: Saurabh Shrivastava of Xilinx on paper "How to Kill 4 Birds with 1 Stone Using Formal"
Joseph Hupcey III speaks with Saurabh Shrivastava of Xilinx about his DVCon paper, "How to Kill 4 Birds with 1 Stone: In a Highly Configurable Design Using F...
- cadencedesign
- Length: 4:11
- Views: 61
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DVCon 2010 "Day 0" interview with Joe Hupcey III and Steve Svoboda
If you were looking for more evidence that the transition from RTL to ESL is gaining momentum, today at "Day 0" of DVCon (a/k/a "SystemC Day") you would disc...
- jhupcey
- Length: 4:25
- Views: 152
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New Assertion-Based Verification IP for ARM's "ACE" cache coherency protocol
R&D Product Expert Joerg Muller introduces Cadence's new Assertion-Based Verification IP for ARM's AMBA 4 AXI™ Coherency Extensions (ACE™) cache coherency pr...
- jhupcey
- Length: 3:18
- Views: 167
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DAC 2012: Interview with Dr. Kerstin Eder about her course on functional verification
Dr. Kerstin Eder, Sr. Lecturer in the Computer Science department at the University of Bristol, UK teaches a course on functional verification. In this inter...
- jhupcey
- Length: 4:38
- Views: 179
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Report From Silicon Valley With Application Engineer Bin Ju
Luckily I was able to track down my very busy colleague Bin Ju between assignments and interview her about her first-hand observations of what's going on her...
- jhupcey
- Length: 2:42
- Views: 95
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2012 DAC User Track: Samsung paper on Improving Elaboration & Simulation Performance
Adam Sherer presents the poster, "Verification of Massive Advanced Node SoCs" at the 2012 DAC User Track. Abstract: 2U.17 — Verification of Massive Advanced ...
- jhupcey
- Length: 4:45
- Views: 38
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DAC 2012 Update on AMIQ's DVT IDE -- New RTL Design Work Flow Support
AMIQ has been in the vanguard of supporting functional verification methodologies and testbench creation for years. The success verification engineers using ...
- jhupcey
- Length: 5:14
- Views: 140
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DVCon 2012: Neyaz Khan on his case study applying UVM Mixed Signal methodology
In this interview Neyaz Khan of Maxim Semiconductor reviews the highlights of his paper, "From Spec to Verification Closure: A Case Study of Applying UVM-MS ...
- jhupcey
- Length: 2:52
- Views: 175
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Meet Bob Kurshan, Cadence Fellow and Incisive Formal R&D Leader, talks about Formal Engine Tech
Continuing the series of introducing you to the people that create the tools you use every day, in this video I ask Bob Kurshan, Cadence Fellow and R&D leade...
- jhupcey
- Length: 6:31
- Views: 242
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Family-Style Homage to the GoPro Hero2 (a/k/a what I did on my summer vacation)
Over the past three years I've learned that raising a child is much more of an adventure than I could have ever imagined (and I thought I had a clue, coming ...
- jhupcey
- Length: 2:08
- Views: 298
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DVCon 2012: Man vs Machine ... and the better Rubik's Cube solver is ...
DVCon 2012 is focused on functional verification methodologies. Hence, in this video I put 2 competing methodologies to the test: a Lego Mindstorms robot pro...
- jhupcey
- Length: 0:39
- Views: 358
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DVCon 2012: NextOp update - new customers, new data from the field
In this interview on the floor of DVCon 2012, NextOp CEO shares the latest news on how customers are applying assertion synthesis for spec verification as mu...
- jhupcey
- Length: 3:09
- Views: 105
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DAC 2011: Update on AMIQ's DVT IDE at DAC
At DAC 2011 AMIQ introduced a long awaited feature to DVT for Specmaniacs in particular: direct integration with the Specman debugger. In this interview shot...
- jhupcey
- Length: 3:34
- Views: 162
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DVCon 2012: Interview with Rob Meyer on Low Power Verification Strategy
In this interview, Rob Meyer of Medtronic talks about his DVCon 2012 paper, "Creating a Complete Low Power Verification Strategy Using the Common Power Forma...
- jhupcey
- Length: 3:02
- Views: 70
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